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/ SGI Origin & Onyx2 Patches 1998 May / Origin and Onyx2 System Disk Patches May 1998.img / dist / patchSG0002795.idb / usr / diags / IR / data / voc1b.tcbist.z / voc1b.tcbist
Text File  |  1998-03-05  |  37KB  |  1,072 lines
  1. tcbist_ram     13 voc1_core.resizing1.odd_mem
  2. tcbist_ram     14 voc1_core.resizing1.even_mem
  3. tcbist_ram     15 voc1_core.vof1.vsd_lut
  4. tcbist_hw_rst
  5. tcbist_sw_rst
  6. tcbist_ctrl    36:000000000000000000000000000000000000
  7. tcbist_sw_rst
  8. tcbist_ctrl    36:000000011000000000000000000000101001
  9. tcbist_poll1   0
  10. tcbist_sw_rst
  11. tcbist_ctrl    36:000000000000000000000000000000000000
  12. tcbist_sw_rst
  13. tcbist_comment forcing BIST failure
  14. tcbist_ram     15 voc1_core.vof1.vsd_lut-0
  15. tcbist_ctrl    36:000000011100000000000000000000110001
  16. tcbist_poll1   0
  17. tcbist_ctrl    36:000000011100000011000000000000101001
  18. tcbist_poll1   0
  19. tcbist_expect1 15
  20. tcbist_sw_rst
  21. tcbist_comment Data Retention Test
  22. tcbist_ctrl    36:000000001100000000111111111111110011
  23. tcbist_poll1   0
  24. tcbist_sleep  100
  25. tcbist_ctrl    36:000000001100000111011111111111000011
  26. tcbist_poll1   0
  27. tcbist_sleep  100
  28. tcbist_ctrl    36:000000001100000011011111111111101011
  29. tcbist_poll1   0
  30. tcbist_ctrl    36:000000001100000011111000000000110011
  31. tcbist_poll1   0
  32. tcbist_sleep  100
  33. tcbist_ctrl    36:000000001100000111011000000000000011
  34. tcbist_poll1   0
  35. tcbist_sleep  100
  36. tcbist_ctrl    36:000000001100000011011000000000101011
  37. tcbist_poll1   0
  38. tcbist_comment IFA-9 Pattern Test
  39. tcbist_ctrl    36:000000001100000000111000000000110111
  40. tcbist_poll1   0
  41. tcbist_ctrl    36:000000001100000111011000000000000111
  42. tcbist_poll1   0
  43. tcbist_ctrl    36:000000001100000011111000000000000111
  44. tcbist_poll1   0
  45. tcbist_ctrl    36:000000001100000111011000000000000011
  46. tcbist_poll1   0
  47. tcbist_ctrl    36:000000001100000011111000000000000011
  48. tcbist_poll1   0
  49. tcbist_ctrl    36:000000001100000111011000000000000111
  50. tcbist_poll1   0
  51. tcbist_ctrl    36:000000001100000011011000000000101111
  52. tcbist_poll1   0
  53. tcbist_comment Zebra Pattern Test
  54. tcbist_ctrl    36:000000001100000000111111111000110111
  55. tcbist_poll1   0
  56. tcbist_ctrl    36:000000001100000111111111111000101111
  57. tcbist_poll1   0
  58. tcbist_ctrl    36:000000001100000111011111111000110111
  59. tcbist_poll1   0
  60. tcbist_ctrl    36:000000001100000011011111111000101111
  61. tcbist_poll1   0
  62. tcbist_comment March B Pattern Test
  63. tcbist_ctrl    36:000000001100000000111000000000110111
  64. tcbist_poll1   0
  65. tcbist_ctrl    36:000000001100000111011000000000000111
  66. tcbist_poll1   0
  67. tcbist_ctrl    36:000000001100000011111000000000001111
  68. tcbist_poll1   0
  69. tcbist_ctrl    36:000000001100000011111000000000010011
  70. tcbist_poll1   0
  71. tcbist_ctrl    36:000000001100000111011000000000001011
  72. tcbist_poll1   0
  73. tcbist_ctrl    36:000000001100000111011000000000101111
  74. tcbist_poll1   0
  75. tcbist_comment Modulo-3 Pattern Test
  76. tcbist_ctrl    36:000000001100000000000000000101110101
  77. tcbist_poll1   0
  78. tcbist_ctrl    36:000000001100000000000000001101000101
  79. tcbist_poll1   0
  80. tcbist_ctrl    36:000000001100000000000001010101000101
  81. tcbist_poll1   0
  82. tcbist_ctrl    36:000000001100000000001010000101000101
  83. tcbist_poll1   0
  84. tcbist_ctrl    36:000000001100000001001000001101000101
  85. tcbist_poll1   0
  86. tcbist_ctrl    36:000000001100000001001001010101000101
  87. tcbist_poll1   0
  88. tcbist_ctrl    36:000000001100000001010010000101000101
  89. tcbist_poll1   0
  90. tcbist_ctrl    36:000000001100000010010000001101000101
  91. tcbist_poll1   0
  92. tcbist_ctrl    36:000000001100000010010001010101000101
  93. tcbist_poll1   0
  94. tcbist_ctrl    36:000000001100000010011010000101000101
  95. tcbist_poll1   0
  96. tcbist_ctrl    36:000000001100000011011000001101000101
  97. tcbist_poll1   0
  98. tcbist_ctrl    36:000000001100000011011001010101000101
  99. tcbist_poll1   0
  100. tcbist_ctrl    36:000000001100000011100010000101000101
  101. tcbist_poll1   0
  102. tcbist_ctrl    36:000000001100000100100000001101000101
  103. tcbist_poll1   0
  104. tcbist_ctrl    36:000000001100000100100001010101000101
  105. tcbist_poll1   0
  106. tcbist_ctrl    36:000000001100000100101010000101000101
  107. tcbist_poll1   0
  108. tcbist_ctrl    36:000000001100000101101000001101000101
  109. tcbist_poll1   0
  110. tcbist_ctrl    36:000000001100000101101001010101000101
  111. tcbist_poll1   0
  112. tcbist_ctrl    36:000000001100000101110010000101000101
  113. tcbist_poll1   0
  114. tcbist_ctrl    36:000000001100000110110000001101000101
  115. tcbist_poll1   0
  116. tcbist_ctrl    36:000000001100000110110001010101000101
  117. tcbist_poll1   0
  118. tcbist_ctrl    36:000000001100000110111010000101000101
  119. tcbist_poll1   0
  120. tcbist_ctrl    36:000000001100000111111000001101000101
  121. tcbist_poll1   0
  122. tcbist_ctrl    36:000000001100000111111001010101000101
  123. tcbist_poll1   0
  124. tcbist_ctrl    36:000000001100000111111010010101101101
  125. tcbist_poll1   0
  126. tcbist_expect0 15
  127. tcbist_sw_rst
  128. tcbist_ctrl    36:000000000001010000000000000000000000
  129. tcbist_sw_rst
  130. tcbist_comment forcing BIST failure
  131. tcbist_ram     14 voc1_core.resizing1.even_mem-0
  132. tcbist_ram     13 voc1_core.resizing1.odd_mem-0
  133. tcbist_ctrl    36:000000011101010000000000000000110001
  134. tcbist_poll1   0
  135. tcbist_ctrl    36:000000011101010011000000000000101001
  136. tcbist_poll1   0
  137. tcbist_expect1 13 14
  138. tcbist_sw_rst
  139. tcbist_comment Data Retention Test
  140. tcbist_ctrl    36:000000000101010000111111111111110011
  141. tcbist_poll1   0
  142. tcbist_sleep  100
  143. tcbist_ctrl    36:000000000101010111011111111111000011
  144. tcbist_poll1   0
  145. tcbist_sleep  100
  146. tcbist_ctrl    36:000000000101010011011111111111101011
  147. tcbist_poll1   0
  148. tcbist_ctrl    36:000000000101010011111000000000110011
  149. tcbist_poll1   0
  150. tcbist_sleep  100
  151. tcbist_ctrl    36:000000000101010111011000000000000011
  152. tcbist_poll1   0
  153. tcbist_sleep  100
  154. tcbist_ctrl    36:000000000101010011011000000000101011
  155. tcbist_poll1   0
  156. tcbist_comment IFA-9 Pattern Test
  157. tcbist_ctrl    36:000000000101010000111000000000110111
  158. tcbist_poll1   0
  159. tcbist_ctrl    36:000000000101010111011000000000000111
  160. tcbist_poll1   0
  161. tcbist_ctrl    36:000000000101010011111000000000000111
  162. tcbist_poll1   0
  163. tcbist_ctrl    36:000000000101010111011000000000000011
  164. tcbist_poll1   0
  165. tcbist_ctrl    36:000000000101010011111000000000000011
  166. tcbist_poll1   0
  167. tcbist_ctrl    36:000000000101010111011000000000000111
  168. tcbist_poll1   0
  169. tcbist_ctrl    36:000000000101010011011000000000101111
  170. tcbist_poll1   0
  171. tcbist_comment Zebra Pattern Test
  172. tcbist_ctrl    36:000000000101010000111111111000110111
  173. tcbist_poll1   0
  174. tcbist_ctrl    36:000000000101010111111111111000101111
  175. tcbist_poll1   0
  176. tcbist_ctrl    36:000000000101010111011111111000110111
  177. tcbist_poll1   0
  178. tcbist_ctrl    36:000000000101010011011111111000101111
  179. tcbist_poll1   0
  180. tcbist_comment March B Pattern Test
  181. tcbist_ctrl    36:000000000101010000111000000000110111
  182. tcbist_poll1   0
  183. tcbist_ctrl    36:000000000101010111011000000000000111
  184. tcbist_poll1   0
  185. tcbist_ctrl    36:000000000101010011111000000000001111
  186. tcbist_poll1   0
  187. tcbist_ctrl    36:000000000101010011111000000000010011
  188. tcbist_poll1   0
  189. tcbist_ctrl    36:000000000101010111011000000000001011
  190. tcbist_poll1   0
  191. tcbist_ctrl    36:000000000101010111011000000000101111
  192. tcbist_poll1   0
  193. tcbist_comment Modulo-3 Pattern Test
  194. tcbist_ctrl    36:000000000101010000000000000101110101
  195. tcbist_poll1   0
  196. tcbist_ctrl    36:000000000101010000000000001101000101
  197. tcbist_poll1   0
  198. tcbist_ctrl    36:000000000101010000000001010101000101
  199. tcbist_poll1   0
  200. tcbist_ctrl    36:000000000101010000001010000101000101
  201. tcbist_poll1   0
  202. tcbist_ctrl    36:000000000101010001001000001101000101
  203. tcbist_poll1   0
  204. tcbist_ctrl    36:000000000101010001001001010101000101
  205. tcbist_poll1   0
  206. tcbist_ctrl    36:000000000101010001010010000101000101
  207. tcbist_poll1   0
  208. tcbist_ctrl    36:000000000101010010010000001101000101
  209. tcbist_poll1   0
  210. tcbist_ctrl    36:000000000101010010010001010101000101
  211. tcbist_poll1   0
  212. tcbist_ctrl    36:000000000101010010011010000101000101
  213. tcbist_poll1   0
  214. tcbist_ctrl    36:000000000101010011011000001101000101
  215. tcbist_poll1   0
  216. tcbist_ctrl    36:000000000101010011011001010101000101
  217. tcbist_poll1   0
  218. tcbist_ctrl    36:000000000101010011100010000101000101
  219. tcbist_poll1   0
  220. tcbist_ctrl    36:000000000101010100100000001101000101
  221. tcbist_poll1   0
  222. tcbist_ctrl    36:000000000101010100100001010101000101
  223. tcbist_poll1   0
  224. tcbist_ctrl    36:000000000101010100101010000101000101
  225. tcbist_poll1   0
  226. tcbist_ctrl    36:000000000101010101101000001101000101
  227. tcbist_poll1   0
  228. tcbist_ctrl    36:000000000101010101101001010101000101
  229. tcbist_poll1   0
  230. tcbist_ctrl    36:000000000101010101110010000101000101
  231. tcbist_poll1   0
  232. tcbist_ctrl    36:000000000101010110110000001101000101
  233. tcbist_poll1   0
  234. tcbist_ctrl    36:000000000101010110110001010101000101
  235. tcbist_poll1   0
  236. tcbist_ctrl    36:000000000101010110111010000101000101
  237. tcbist_poll1   0
  238. tcbist_ctrl    36:000000000101010111111000001101000101
  239. tcbist_poll1   0
  240. tcbist_ctrl    36:000000000101010111111001010101000101
  241. tcbist_poll1   0
  242. tcbist_ctrl    36:000000000101010111111010010101101101
  243. tcbist_poll1   0
  244. tcbist_expect0 13 14
  245. tcbist_sw_rst
  246. tcbist_ctrl    36:000000000001010000000000000000000000
  247. tcbist_sw_rst
  248. tcbist_comment forcing BIST failure
  249. tcbist_ram     14 voc1_core.resizing1.even_mem-1
  250. tcbist_ram     13 voc1_core.resizing1.odd_mem-1
  251. tcbist_ctrl    36:000000111101010000000000000000110001
  252. tcbist_poll1   0
  253. tcbist_ctrl    36:000000111101010011000000000000101001
  254. tcbist_poll1   0
  255. tcbist_expect1 13 14
  256. tcbist_sw_rst
  257. tcbist_comment Data Retention Test
  258. tcbist_ctrl    36:000000100101010000111111111111110011
  259. tcbist_poll1   0
  260. tcbist_sleep  100
  261. tcbist_ctrl    36:000000100101010111011111111111000011
  262. tcbist_poll1   0
  263. tcbist_sleep  100
  264. tcbist_ctrl    36:000000100101010011011111111111101011
  265. tcbist_poll1   0
  266. tcbist_ctrl    36:000000100101010011111000000000110011
  267. tcbist_poll1   0
  268. tcbist_sleep  100
  269. tcbist_ctrl    36:000000100101010111011000000000000011
  270. tcbist_poll1   0
  271. tcbist_sleep  100
  272. tcbist_ctrl    36:000000100101010011011000000000101011
  273. tcbist_poll1   0
  274. tcbist_comment IFA-9 Pattern Test
  275. tcbist_ctrl    36:000000100101010000111000000000110111
  276. tcbist_poll1   0
  277. tcbist_ctrl    36:000000100101010111011000000000000111
  278. tcbist_poll1   0
  279. tcbist_ctrl    36:000000100101010011111000000000000111
  280. tcbist_poll1   0
  281. tcbist_ctrl    36:000000100101010111011000000000000011
  282. tcbist_poll1   0
  283. tcbist_ctrl    36:000000100101010011111000000000000011
  284. tcbist_poll1   0
  285. tcbist_ctrl    36:000000100101010111011000000000000111
  286. tcbist_poll1   0
  287. tcbist_ctrl    36:000000100101010011011000000000101111
  288. tcbist_poll1   0
  289. tcbist_comment Zebra Pattern Test
  290. tcbist_ctrl    36:000000100101010000111111111000110111
  291. tcbist_poll1   0
  292. tcbist_ctrl    36:000000100101010111111111111000101111
  293. tcbist_poll1   0
  294. tcbist_ctrl    36:000000100101010111011111111000110111
  295. tcbist_poll1   0
  296. tcbist_ctrl    36:000000100101010011011111111000101111
  297. tcbist_poll1   0
  298. tcbist_comment March B Pattern Test
  299. tcbist_ctrl    36:000000100101010000111000000000110111
  300. tcbist_poll1   0
  301. tcbist_ctrl    36:000000100101010111011000000000000111
  302. tcbist_poll1   0
  303. tcbist_ctrl    36:000000100101010011111000000000001111
  304. tcbist_poll1   0
  305. tcbist_ctrl    36:000000100101010011111000000000010011
  306. tcbist_poll1   0
  307. tcbist_ctrl    36:000000100101010111011000000000001011
  308. tcbist_poll1   0
  309. tcbist_ctrl    36:000000100101010111011000000000101111
  310. tcbist_poll1   0
  311. tcbist_comment Modulo-3 Pattern Test
  312. tcbist_ctrl    36:000000100101010000000000000101110101
  313. tcbist_poll1   0
  314. tcbist_ctrl    36:000000100101010000000000001101000101
  315. tcbist_poll1   0
  316. tcbist_ctrl    36:000000100101010000000001010101000101
  317. tcbist_poll1   0
  318. tcbist_ctrl    36:000000100101010000001010000101000101
  319. tcbist_poll1   0
  320. tcbist_ctrl    36:000000100101010001001000001101000101
  321. tcbist_poll1   0
  322. tcbist_ctrl    36:000000100101010001001001010101000101
  323. tcbist_poll1   0
  324. tcbist_ctrl    36:000000100101010001010010000101000101
  325. tcbist_poll1   0
  326. tcbist_ctrl    36:000000100101010010010000001101000101
  327. tcbist_poll1   0
  328. tcbist_ctrl    36:000000100101010010010001010101000101
  329. tcbist_poll1   0
  330. tcbist_ctrl    36:000000100101010010011010000101000101
  331. tcbist_poll1   0
  332. tcbist_ctrl    36:000000100101010011011000001101000101
  333. tcbist_poll1   0
  334. tcbist_ctrl    36:000000100101010011011001010101000101
  335. tcbist_poll1   0
  336. tcbist_ctrl    36:000000100101010011100010000101000101
  337. tcbist_poll1   0
  338. tcbist_ctrl    36:000000100101010100100000001101000101
  339. tcbist_poll1   0
  340. tcbist_ctrl    36:000000100101010100100001010101000101
  341. tcbist_poll1   0
  342. tcbist_ctrl    36:000000100101010100101010000101000101
  343. tcbist_poll1   0
  344. tcbist_ctrl    36:000000100101010101101000001101000101
  345. tcbist_poll1   0
  346. tcbist_ctrl    36:000000100101010101101001010101000101
  347. tcbist_poll1   0
  348. tcbist_ctrl    36:000000100101010101110010000101000101
  349. tcbist_poll1   0
  350. tcbist_ctrl    36:000000100101010110110000001101000101
  351. tcbist_poll1   0
  352. tcbist_ctrl    36:000000100101010110110001010101000101
  353. tcbist_poll1   0
  354. tcbist_ctrl    36:000000100101010110111010000101000101
  355. tcbist_poll1   0
  356. tcbist_ctrl    36:000000100101010111111000001101000101
  357. tcbist_poll1   0
  358. tcbist_ctrl    36:000000100101010111111001010101000101
  359. tcbist_poll1   0
  360. tcbist_ctrl    36:000000100101010111111010010101101101
  361. tcbist_poll1   0
  362. tcbist_expect0 13 14
  363. tcbist_sw_rst
  364. tcbist_ctrl    36:000000000001010000000000000000000000
  365. tcbist_sw_rst
  366. tcbist_comment forcing BIST failure
  367. tcbist_ram     14 voc1_core.resizing1.even_mem-2
  368. tcbist_ram     13 voc1_core.resizing1.odd_mem-2
  369. tcbist_ctrl    36:000001011101010000000000000000110001
  370. tcbist_poll1   0
  371. tcbist_ctrl    36:000001011101010011000000000000101001
  372. tcbist_poll1   0
  373. tcbist_expect1 13 14
  374. tcbist_sw_rst
  375. tcbist_comment Data Retention Test
  376. tcbist_ctrl    36:000001000101010000111111111111110011
  377. tcbist_poll1   0
  378. tcbist_sleep  100
  379. tcbist_ctrl    36:000001000101010111011111111111000011
  380. tcbist_poll1   0
  381. tcbist_sleep  100
  382. tcbist_ctrl    36:000001000101010011011111111111101011
  383. tcbist_poll1   0
  384. tcbist_ctrl    36:000001000101010011111000000000110011
  385. tcbist_poll1   0
  386. tcbist_sleep  100
  387. tcbist_ctrl    36:000001000101010111011000000000000011
  388. tcbist_poll1   0
  389. tcbist_sleep  100
  390. tcbist_ctrl    36:000001000101010011011000000000101011
  391. tcbist_poll1   0
  392. tcbist_comment IFA-9 Pattern Test
  393. tcbist_ctrl    36:000001000101010000111000000000110111
  394. tcbist_poll1   0
  395. tcbist_ctrl    36:000001000101010111011000000000000111
  396. tcbist_poll1   0
  397. tcbist_ctrl    36:000001000101010011111000000000000111
  398. tcbist_poll1   0
  399. tcbist_ctrl    36:000001000101010111011000000000000011
  400. tcbist_poll1   0
  401. tcbist_ctrl    36:000001000101010011111000000000000011
  402. tcbist_poll1   0
  403. tcbist_ctrl    36:000001000101010111011000000000000111
  404. tcbist_poll1   0
  405. tcbist_ctrl    36:000001000101010011011000000000101111
  406. tcbist_poll1   0
  407. tcbist_comment Zebra Pattern Test
  408. tcbist_ctrl    36:000001000101010000111111111000110111
  409. tcbist_poll1   0
  410. tcbist_ctrl    36:000001000101010111111111111000101111
  411. tcbist_poll1   0
  412. tcbist_ctrl    36:000001000101010111011111111000110111
  413. tcbist_poll1   0
  414. tcbist_ctrl    36:000001000101010011011111111000101111
  415. tcbist_poll1   0
  416. tcbist_comment March B Pattern Test
  417. tcbist_ctrl    36:000001000101010000111000000000110111
  418. tcbist_poll1   0
  419. tcbist_ctrl    36:000001000101010111011000000000000111
  420. tcbist_poll1   0
  421. tcbist_ctrl    36:000001000101010011111000000000001111
  422. tcbist_poll1   0
  423. tcbist_ctrl    36:000001000101010011111000000000010011
  424. tcbist_poll1   0
  425. tcbist_ctrl    36:000001000101010111011000000000001011
  426. tcbist_poll1   0
  427. tcbist_ctrl    36:000001000101010111011000000000101111
  428. tcbist_poll1   0
  429. tcbist_comment Modulo-3 Pattern Test
  430. tcbist_ctrl    36:000001000101010000000000000101110101
  431. tcbist_poll1   0
  432. tcbist_ctrl    36:000001000101010000000000001101000101
  433. tcbist_poll1   0
  434. tcbist_ctrl    36:000001000101010000000001010101000101
  435. tcbist_poll1   0
  436. tcbist_ctrl    36:000001000101010000001010000101000101
  437. tcbist_poll1   0
  438. tcbist_ctrl    36:000001000101010001001000001101000101
  439. tcbist_poll1   0
  440. tcbist_ctrl    36:000001000101010001001001010101000101
  441. tcbist_poll1   0
  442. tcbist_ctrl    36:000001000101010001010010000101000101
  443. tcbist_poll1   0
  444. tcbist_ctrl    36:000001000101010010010000001101000101
  445. tcbist_poll1   0
  446. tcbist_ctrl    36:000001000101010010010001010101000101
  447. tcbist_poll1   0
  448. tcbist_ctrl    36:000001000101010010011010000101000101
  449. tcbist_poll1   0
  450. tcbist_ctrl    36:000001000101010011011000001101000101
  451. tcbist_poll1   0
  452. tcbist_ctrl    36:000001000101010011011001010101000101
  453. tcbist_poll1   0
  454. tcbist_ctrl    36:000001000101010011100010000101000101
  455. tcbist_poll1   0
  456. tcbist_ctrl    36:000001000101010100100000001101000101
  457. tcbist_poll1   0
  458. tcbist_ctrl    36:000001000101010100100001010101000101
  459. tcbist_poll1   0
  460. tcbist_ctrl    36:000001000101010100101010000101000101
  461. tcbist_poll1   0
  462. tcbist_ctrl    36:000001000101010101101000001101000101
  463. tcbist_poll1   0
  464. tcbist_ctrl    36:000001000101010101101001010101000101
  465. tcbist_poll1   0
  466. tcbist_ctrl    36:000001000101010101110010000101000101
  467. tcbist_poll1   0
  468. tcbist_ctrl    36:000001000101010110110000001101000101
  469. tcbist_poll1   0
  470. tcbist_ctrl    36:000001000101010110110001010101000101
  471. tcbist_poll1   0
  472. tcbist_ctrl    36:000001000101010110111010000101000101
  473. tcbist_poll1   0
  474. tcbist_ctrl    36:000001000101010111111000001101000101
  475. tcbist_poll1   0
  476. tcbist_ctrl    36:000001000101010111111001010101000101
  477. tcbist_poll1   0
  478. tcbist_ctrl    36:000001000101010111111010010101101101
  479. tcbist_poll1   0
  480. tcbist_expect0 13 14
  481. tcbist_sw_rst
  482. tcbist_ctrl    36:000000000001010000000000000000000000
  483. tcbist_sw_rst
  484. tcbist_comment forcing BIST failure
  485. tcbist_ram     14 voc1_core.resizing1.even_mem-3
  486. tcbist_ram     13 voc1_core.resizing1.odd_mem-3
  487. tcbist_ctrl    36:000001111101010000000000000000110001
  488. tcbist_poll1   0
  489. tcbist_ctrl    36:000001111101010011000000000000101001
  490. tcbist_poll1   0
  491. tcbist_expect1 13 14
  492. tcbist_sw_rst
  493. tcbist_comment Data Retention Test
  494. tcbist_ctrl    36:000001100101010000111111111111110011
  495. tcbist_poll1   0
  496. tcbist_sleep  100
  497. tcbist_ctrl    36:000001100101010111011111111111000011
  498. tcbist_poll1   0
  499. tcbist_sleep  100
  500. tcbist_ctrl    36:000001100101010011011111111111101011
  501. tcbist_poll1   0
  502. tcbist_ctrl    36:000001100101010011111000000000110011
  503. tcbist_poll1   0
  504. tcbist_sleep  100
  505. tcbist_ctrl    36:000001100101010111011000000000000011
  506. tcbist_poll1   0
  507. tcbist_sleep  100
  508. tcbist_ctrl    36:000001100101010011011000000000101011
  509. tcbist_poll1   0
  510. tcbist_comment IFA-9 Pattern Test
  511. tcbist_ctrl    36:000001100101010000111000000000110111
  512. tcbist_poll1   0
  513. tcbist_ctrl    36:000001100101010111011000000000000111
  514. tcbist_poll1   0
  515. tcbist_ctrl    36:000001100101010011111000000000000111
  516. tcbist_poll1   0
  517. tcbist_ctrl    36:000001100101010111011000000000000011
  518. tcbist_poll1   0
  519. tcbist_ctrl    36:000001100101010011111000000000000011
  520. tcbist_poll1   0
  521. tcbist_ctrl    36:000001100101010111011000000000000111
  522. tcbist_poll1   0
  523. tcbist_ctrl    36:000001100101010011011000000000101111
  524. tcbist_poll1   0
  525. tcbist_comment Zebra Pattern Test
  526. tcbist_ctrl    36:000001100101010000111111111000110111
  527. tcbist_poll1   0
  528. tcbist_ctrl    36:000001100101010111111111111000101111
  529. tcbist_poll1   0
  530. tcbist_ctrl    36:000001100101010111011111111000110111
  531. tcbist_poll1   0
  532. tcbist_ctrl    36:000001100101010011011111111000101111
  533. tcbist_poll1   0
  534. tcbist_comment March B Pattern Test
  535. tcbist_ctrl    36:000001100101010000111000000000110111
  536. tcbist_poll1   0
  537. tcbist_ctrl    36:000001100101010111011000000000000111
  538. tcbist_poll1   0
  539. tcbist_ctrl    36:000001100101010011111000000000001111
  540. tcbist_poll1   0
  541. tcbist_ctrl    36:000001100101010011111000000000010011
  542. tcbist_poll1   0
  543. tcbist_ctrl    36:000001100101010111011000000000001011
  544. tcbist_poll1   0
  545. tcbist_ctrl    36:000001100101010111011000000000101111
  546. tcbist_poll1   0
  547. tcbist_comment Modulo-3 Pattern Test
  548. tcbist_ctrl    36:000001100101010000000000000101110101
  549. tcbist_poll1   0
  550. tcbist_ctrl    36:000001100101010000000000001101000101
  551. tcbist_poll1   0
  552. tcbist_ctrl    36:000001100101010000000001010101000101
  553. tcbist_poll1   0
  554. tcbist_ctrl    36:000001100101010000001010000101000101
  555. tcbist_poll1   0
  556. tcbist_ctrl    36:000001100101010001001000001101000101
  557. tcbist_poll1   0
  558. tcbist_ctrl    36:000001100101010001001001010101000101
  559. tcbist_poll1   0
  560. tcbist_ctrl    36:000001100101010001010010000101000101
  561. tcbist_poll1   0
  562. tcbist_ctrl    36:000001100101010010010000001101000101
  563. tcbist_poll1   0
  564. tcbist_ctrl    36:000001100101010010010001010101000101
  565. tcbist_poll1   0
  566. tcbist_ctrl    36:000001100101010010011010000101000101
  567. tcbist_poll1   0
  568. tcbist_ctrl    36:000001100101010011011000001101000101
  569. tcbist_poll1   0
  570. tcbist_ctrl    36:000001100101010011011001010101000101
  571. tcbist_poll1   0
  572. tcbist_ctrl    36:000001100101010011100010000101000101
  573. tcbist_poll1   0
  574. tcbist_ctrl    36:000001100101010100100000001101000101
  575. tcbist_poll1   0
  576. tcbist_ctrl    36:000001100101010100100001010101000101
  577. tcbist_poll1   0
  578. tcbist_ctrl    36:000001100101010100101010000101000101
  579. tcbist_poll1   0
  580. tcbist_ctrl    36:000001100101010101101000001101000101
  581. tcbist_poll1   0
  582. tcbist_ctrl    36:000001100101010101101001010101000101
  583. tcbist_poll1   0
  584. tcbist_ctrl    36:000001100101010101110010000101000101
  585. tcbist_poll1   0
  586. tcbist_ctrl    36:000001100101010110110000001101000101
  587. tcbist_poll1   0
  588. tcbist_ctrl    36:000001100101010110110001010101000101
  589. tcbist_poll1   0
  590. tcbist_ctrl    36:000001100101010110111010000101000101
  591. tcbist_poll1   0
  592. tcbist_ctrl    36:000001100101010111111000001101000101
  593. tcbist_poll1   0
  594. tcbist_ctrl    36:000001100101010111111001010101000101
  595. tcbist_poll1   0
  596. tcbist_ctrl    36:000001100101010111111010010101101101
  597. tcbist_poll1   0
  598. tcbist_expect0 13 14
  599. tcbist_sw_rst
  600. tcbist_ctrl    36:000000000001010000000000000000000000
  601. tcbist_sw_rst
  602. tcbist_comment forcing BIST failure
  603. tcbist_ram     14 voc1_core.resizing1.even_mem-4
  604. tcbist_ram     13 voc1_core.resizing1.odd_mem-4
  605. tcbist_ctrl    36:000010011101010000000000000000110001
  606. tcbist_poll1   0
  607. tcbist_ctrl    36:000010011101010011000000000000101001
  608. tcbist_poll1   0
  609. tcbist_expect1 13 14
  610. tcbist_sw_rst
  611. tcbist_comment Data Retention Test
  612. tcbist_ctrl    36:000010000101010000111111111111110011
  613. tcbist_poll1   0
  614. tcbist_sleep  100
  615. tcbist_ctrl    36:000010000101010111011111111111000011
  616. tcbist_poll1   0
  617. tcbist_sleep  100
  618. tcbist_ctrl    36:000010000101010011011111111111101011
  619. tcbist_poll1   0
  620. tcbist_ctrl    36:000010000101010011111000000000110011
  621. tcbist_poll1   0
  622. tcbist_sleep  100
  623. tcbist_ctrl    36:000010000101010111011000000000000011
  624. tcbist_poll1   0
  625. tcbist_sleep  100
  626. tcbist_ctrl    36:000010000101010011011000000000101011
  627. tcbist_poll1   0
  628. tcbist_comment IFA-9 Pattern Test
  629. tcbist_ctrl    36:000010000101010000111000000000110111
  630. tcbist_poll1   0
  631. tcbist_ctrl    36:000010000101010111011000000000000111
  632. tcbist_poll1   0
  633. tcbist_ctrl    36:000010000101010011111000000000000111
  634. tcbist_poll1   0
  635. tcbist_ctrl    36:000010000101010111011000000000000011
  636. tcbist_poll1   0
  637. tcbist_ctrl    36:000010000101010011111000000000000011
  638. tcbist_poll1   0
  639. tcbist_ctrl    36:000010000101010111011000000000000111
  640. tcbist_poll1   0
  641. tcbist_ctrl    36:000010000101010011011000000000101111
  642. tcbist_poll1   0
  643. tcbist_comment Zebra Pattern Test
  644. tcbist_ctrl    36:000010000101010000111111111000110111
  645. tcbist_poll1   0
  646. tcbist_ctrl    36:000010000101010111111111111000101111
  647. tcbist_poll1   0
  648. tcbist_ctrl    36:000010000101010111011111111000110111
  649. tcbist_poll1   0
  650. tcbist_ctrl    36:000010000101010011011111111000101111
  651. tcbist_poll1   0
  652. tcbist_comment March B Pattern Test
  653. tcbist_ctrl    36:000010000101010000111000000000110111
  654. tcbist_poll1   0
  655. tcbist_ctrl    36:000010000101010111011000000000000111
  656. tcbist_poll1   0
  657. tcbist_ctrl    36:000010000101010011111000000000001111
  658. tcbist_poll1   0
  659. tcbist_ctrl    36:000010000101010011111000000000010011
  660. tcbist_poll1   0
  661. tcbist_ctrl    36:000010000101010111011000000000001011
  662. tcbist_poll1   0
  663. tcbist_ctrl    36:000010000101010111011000000000101111
  664. tcbist_poll1   0
  665. tcbist_comment Modulo-3 Pattern Test
  666. tcbist_ctrl    36:000010000101010000000000000101110101
  667. tcbist_poll1   0
  668. tcbist_ctrl    36:000010000101010000000000001101000101
  669. tcbist_poll1   0
  670. tcbist_ctrl    36:000010000101010000000001010101000101
  671. tcbist_poll1   0
  672. tcbist_ctrl    36:000010000101010000001010000101000101
  673. tcbist_poll1   0
  674. tcbist_ctrl    36:000010000101010001001000001101000101
  675. tcbist_poll1   0
  676. tcbist_ctrl    36:000010000101010001001001010101000101
  677. tcbist_poll1   0
  678. tcbist_ctrl    36:000010000101010001010010000101000101
  679. tcbist_poll1   0
  680. tcbist_ctrl    36:000010000101010010010000001101000101
  681. tcbist_poll1   0
  682. tcbist_ctrl    36:000010000101010010010001010101000101
  683. tcbist_poll1   0
  684. tcbist_ctrl    36:000010000101010010011010000101000101
  685. tcbist_poll1   0
  686. tcbist_ctrl    36:000010000101010011011000001101000101
  687. tcbist_poll1   0
  688. tcbist_ctrl    36:000010000101010011011001010101000101
  689. tcbist_poll1   0
  690. tcbist_ctrl    36:000010000101010011100010000101000101
  691. tcbist_poll1   0
  692. tcbist_ctrl    36:000010000101010100100000001101000101
  693. tcbist_poll1   0
  694. tcbist_ctrl    36:000010000101010100100001010101000101
  695. tcbist_poll1   0
  696. tcbist_ctrl    36:000010000101010100101010000101000101
  697. tcbist_poll1   0
  698. tcbist_ctrl    36:000010000101010101101000001101000101
  699. tcbist_poll1   0
  700. tcbist_ctrl    36:000010000101010101101001010101000101
  701. tcbist_poll1   0
  702. tcbist_ctrl    36:000010000101010101110010000101000101
  703. tcbist_poll1   0
  704. tcbist_ctrl    36:000010000101010110110000001101000101
  705. tcbist_poll1   0
  706. tcbist_ctrl    36:000010000101010110110001010101000101
  707. tcbist_poll1   0
  708. tcbist_ctrl    36:000010000101010110111010000101000101
  709. tcbist_poll1   0
  710. tcbist_ctrl    36:000010000101010111111000001101000101
  711. tcbist_poll1   0
  712. tcbist_ctrl    36:000010000101010111111001010101000101
  713. tcbist_poll1   0
  714. tcbist_ctrl    36:000010000101010111111010010101101101
  715. tcbist_poll1   0
  716. tcbist_expect0 13 14
  717. tcbist_sw_rst
  718. tcbist_ctrl    36:000000000001010000000000000000000000
  719. tcbist_sw_rst
  720. tcbist_comment forcing BIST failure
  721. tcbist_ram     14 voc1_core.resizing1.even_mem-5
  722. tcbist_ram     13 voc1_core.resizing1.odd_mem-5
  723. tcbist_ctrl    36:000010111101010000000000000000110001
  724. tcbist_poll1   0
  725. tcbist_ctrl    36:000010111101010011000000000000101001
  726. tcbist_poll1   0
  727. tcbist_expect1 13 14
  728. tcbist_sw_rst
  729. tcbist_comment Data Retention Test
  730. tcbist_ctrl    36:000010100101010000111111111111110011
  731. tcbist_poll1   0
  732. tcbist_sleep  100
  733. tcbist_ctrl    36:000010100101010111011111111111000011
  734. tcbist_poll1   0
  735. tcbist_sleep  100
  736. tcbist_ctrl    36:000010100101010011011111111111101011
  737. tcbist_poll1   0
  738. tcbist_ctrl    36:000010100101010011111000000000110011
  739. tcbist_poll1   0
  740. tcbist_sleep  100
  741. tcbist_ctrl    36:000010100101010111011000000000000011
  742. tcbist_poll1   0
  743. tcbist_sleep  100
  744. tcbist_ctrl    36:000010100101010011011000000000101011
  745. tcbist_poll1   0
  746. tcbist_comment IFA-9 Pattern Test
  747. tcbist_ctrl    36:000010100101010000111000000000110111
  748. tcbist_poll1   0
  749. tcbist_ctrl    36:000010100101010111011000000000000111
  750. tcbist_poll1   0
  751. tcbist_ctrl    36:000010100101010011111000000000000111
  752. tcbist_poll1   0
  753. tcbist_ctrl    36:000010100101010111011000000000000011
  754. tcbist_poll1   0
  755. tcbist_ctrl    36:000010100101010011111000000000000011
  756. tcbist_poll1   0
  757. tcbist_ctrl    36:000010100101010111011000000000000111
  758. tcbist_poll1   0
  759. tcbist_ctrl    36:000010100101010011011000000000101111
  760. tcbist_poll1   0
  761. tcbist_comment Zebra Pattern Test
  762. tcbist_ctrl    36:000010100101010000111111111000110111
  763. tcbist_poll1   0
  764. tcbist_ctrl    36:000010100101010111111111111000101111
  765. tcbist_poll1   0
  766. tcbist_ctrl    36:000010100101010111011111111000110111
  767. tcbist_poll1   0
  768. tcbist_ctrl    36:000010100101010011011111111000101111
  769. tcbist_poll1   0
  770. tcbist_comment March B Pattern Test
  771. tcbist_ctrl    36:000010100101010000111000000000110111
  772. tcbist_poll1   0
  773. tcbist_ctrl    36:000010100101010111011000000000000111
  774. tcbist_poll1   0
  775. tcbist_ctrl    36:000010100101010011111000000000001111
  776. tcbist_poll1   0
  777. tcbist_ctrl    36:000010100101010011111000000000010011
  778. tcbist_poll1   0
  779. tcbist_ctrl    36:000010100101010111011000000000001011
  780. tcbist_poll1   0
  781. tcbist_ctrl    36:000010100101010111011000000000101111
  782. tcbist_poll1   0
  783. tcbist_comment Modulo-3 Pattern Test
  784. tcbist_ctrl    36:000010100101010000000000000101110101
  785. tcbist_poll1   0
  786. tcbist_ctrl    36:000010100101010000000000001101000101
  787. tcbist_poll1   0
  788. tcbist_ctrl    36:000010100101010000000001010101000101
  789. tcbist_poll1   0
  790. tcbist_ctrl    36:000010100101010000001010000101000101
  791. tcbist_poll1   0
  792. tcbist_ctrl    36:000010100101010001001000001101000101
  793. tcbist_poll1   0
  794. tcbist_ctrl    36:000010100101010001001001010101000101
  795. tcbist_poll1   0
  796. tcbist_ctrl    36:000010100101010001010010000101000101
  797. tcbist_poll1   0
  798. tcbist_ctrl    36:000010100101010010010000001101000101
  799. tcbist_poll1   0
  800. tcbist_ctrl    36:000010100101010010010001010101000101
  801. tcbist_poll1   0
  802. tcbist_ctrl    36:000010100101010010011010000101000101
  803. tcbist_poll1   0
  804. tcbist_ctrl    36:000010100101010011011000001101000101
  805. tcbist_poll1   0
  806. tcbist_ctrl    36:000010100101010011011001010101000101
  807. tcbist_poll1   0
  808. tcbist_ctrl    36:000010100101010011100010000101000101
  809. tcbist_poll1   0
  810. tcbist_ctrl    36:000010100101010100100000001101000101
  811. tcbist_poll1   0
  812. tcbist_ctrl    36:000010100101010100100001010101000101
  813. tcbist_poll1   0
  814. tcbist_ctrl    36:000010100101010100101010000101000101
  815. tcbist_poll1   0
  816. tcbist_ctrl    36:000010100101010101101000001101000101
  817. tcbist_poll1   0
  818. tcbist_ctrl    36:000010100101010101101001010101000101
  819. tcbist_poll1   0
  820. tcbist_ctrl    36:000010100101010101110010000101000101
  821. tcbist_poll1   0
  822. tcbist_ctrl    36:000010100101010110110000001101000101
  823. tcbist_poll1   0
  824. tcbist_ctrl    36:000010100101010110110001010101000101
  825. tcbist_poll1   0
  826. tcbist_ctrl    36:000010100101010110111010000101000101
  827. tcbist_poll1   0
  828. tcbist_ctrl    36:000010100101010111111000001101000101
  829. tcbist_poll1   0
  830. tcbist_ctrl    36:000010100101010111111001010101000101
  831. tcbist_poll1   0
  832. tcbist_ctrl    36:000010100101010111111010010101101101
  833. tcbist_poll1   0
  834. tcbist_expect0 13 14
  835. tcbist_sw_rst
  836. tcbist_ctrl    36:000000000001010000000000000000000000
  837. tcbist_sw_rst
  838. tcbist_comment forcing BIST failure
  839. tcbist_ram     14 voc1_core.resizing1.even_mem-6
  840. tcbist_ram     13 voc1_core.resizing1.odd_mem-6
  841. tcbist_ctrl    36:000011011101010000000000000000110001
  842. tcbist_poll1   0
  843. tcbist_ctrl    36:000011011101010011000000000000101001
  844. tcbist_poll1   0
  845. tcbist_expect1 13 14
  846. tcbist_sw_rst
  847. tcbist_comment Data Retention Test
  848. tcbist_ctrl    36:000011000101010000111111111111110011
  849. tcbist_poll1   0
  850. tcbist_sleep  100
  851. tcbist_ctrl    36:000011000101010111011111111111000011
  852. tcbist_poll1   0
  853. tcbist_sleep  100
  854. tcbist_ctrl    36:000011000101010011011111111111101011
  855. tcbist_poll1   0
  856. tcbist_ctrl    36:000011000101010011111000000000110011
  857. tcbist_poll1   0
  858. tcbist_sleep  100
  859. tcbist_ctrl    36:000011000101010111011000000000000011
  860. tcbist_poll1   0
  861. tcbist_sleep  100
  862. tcbist_ctrl    36:000011000101010011011000000000101011
  863. tcbist_poll1   0
  864. tcbist_comment IFA-9 Pattern Test
  865. tcbist_ctrl    36:000011000101010000111000000000110111
  866. tcbist_poll1   0
  867. tcbist_ctrl    36:000011000101010111011000000000000111
  868. tcbist_poll1   0
  869. tcbist_ctrl    36:000011000101010011111000000000000111
  870. tcbist_poll1   0
  871. tcbist_ctrl    36:000011000101010111011000000000000011
  872. tcbist_poll1   0
  873. tcbist_ctrl    36:000011000101010011111000000000000011
  874. tcbist_poll1   0
  875. tcbist_ctrl    36:000011000101010111011000000000000111
  876. tcbist_poll1   0
  877. tcbist_ctrl    36:000011000101010011011000000000101111
  878. tcbist_poll1   0
  879. tcbist_comment Zebra Pattern Test
  880. tcbist_ctrl    36:000011000101010000111111111000110111
  881. tcbist_poll1   0
  882. tcbist_ctrl    36:000011000101010111111111111000101111
  883. tcbist_poll1   0
  884. tcbist_ctrl    36:000011000101010111011111111000110111
  885. tcbist_poll1   0
  886. tcbist_ctrl    36:000011000101010011011111111000101111
  887. tcbist_poll1   0
  888. tcbist_comment March B Pattern Test
  889. tcbist_ctrl    36:000011000101010000111000000000110111
  890. tcbist_poll1   0
  891. tcbist_ctrl    36:000011000101010111011000000000000111
  892. tcbist_poll1   0
  893. tcbist_ctrl    36:000011000101010011111000000000001111
  894. tcbist_poll1   0
  895. tcbist_ctrl    36:000011000101010011111000000000010011
  896. tcbist_poll1   0
  897. tcbist_ctrl    36:000011000101010111011000000000001011
  898. tcbist_poll1   0
  899. tcbist_ctrl    36:000011000101010111011000000000101111
  900. tcbist_poll1   0
  901. tcbist_comment Modulo-3 Pattern Test
  902. tcbist_ctrl    36:000011000101010000000000000101110101
  903. tcbist_poll1   0
  904. tcbist_ctrl    36:000011000101010000000000001101000101
  905. tcbist_poll1   0
  906. tcbist_ctrl    36:000011000101010000000001010101000101
  907. tcbist_poll1   0
  908. tcbist_ctrl    36:000011000101010000001010000101000101
  909. tcbist_poll1   0
  910. tcbist_ctrl    36:000011000101010001001000001101000101
  911. tcbist_poll1   0
  912. tcbist_ctrl    36:000011000101010001001001010101000101
  913. tcbist_poll1   0
  914. tcbist_ctrl    36:000011000101010001010010000101000101
  915. tcbist_poll1   0
  916. tcbist_ctrl    36:000011000101010010010000001101000101
  917. tcbist_poll1   0
  918. tcbist_ctrl    36:000011000101010010010001010101000101
  919. tcbist_poll1   0
  920. tcbist_ctrl    36:000011000101010010011010000101000101
  921. tcbist_poll1   0
  922. tcbist_ctrl    36:000011000101010011011000001101000101
  923. tcbist_poll1   0
  924. tcbist_ctrl    36:000011000101010011011001010101000101
  925. tcbist_poll1   0
  926. tcbist_ctrl    36:000011000101010011100010000101000101
  927. tcbist_poll1   0
  928. tcbist_ctrl    36:000011000101010100100000001101000101
  929. tcbist_poll1   0
  930. tcbist_ctrl    36:000011000101010100100001010101000101
  931. tcbist_poll1   0
  932. tcbist_ctrl    36:000011000101010100101010000101000101
  933. tcbist_poll1   0
  934. tcbist_ctrl    36:000011000101010101101000001101000101
  935. tcbist_poll1   0
  936. tcbist_ctrl    36:000011000101010101101001010101000101
  937. tcbist_poll1   0
  938. tcbist_ctrl    36:000011000101010101110010000101000101
  939. tcbist_poll1   0
  940. tcbist_ctrl    36:000011000101010110110000001101000101
  941. tcbist_poll1   0
  942. tcbist_ctrl    36:000011000101010110110001010101000101
  943. tcbist_poll1   0
  944. tcbist_ctrl    36:000011000101010110111010000101000101
  945. tcbist_poll1   0
  946. tcbist_ctrl    36:000011000101010111111000001101000101
  947. tcbist_poll1   0
  948. tcbist_ctrl    36:000011000101010111111001010101000101
  949. tcbist_poll1   0
  950. tcbist_ctrl    36:000011000101010111111010010101101101
  951. tcbist_poll1   0
  952. tcbist_expect0 13 14
  953. tcbist_sw_rst
  954. tcbist_ctrl    36:000000000001010000000000000000000000
  955. tcbist_sw_rst
  956. tcbist_comment forcing BIST failure
  957. tcbist_ram     14 voc1_core.resizing1.even_mem-7
  958. tcbist_ram     13 voc1_core.resizing1.odd_mem-7
  959. tcbist_ctrl    36:000011111101010000000000000000110001
  960. tcbist_poll1   0
  961. tcbist_ctrl    36:000011111101010011000000000000101001
  962. tcbist_poll1   0
  963. tcbist_expect1 13 14
  964. tcbist_sw_rst
  965. tcbist_comment Data Retention Test
  966. tcbist_ctrl    36:000011100101010000111111111111110011
  967. tcbist_poll1   0
  968. tcbist_sleep  100
  969. tcbist_ctrl    36:000011100101010111011111111111000011
  970. tcbist_poll1   0
  971. tcbist_sleep  100
  972. tcbist_ctrl    36:000011100101010011011111111111101011
  973. tcbist_poll1   0
  974. tcbist_ctrl    36:000011100101010011111000000000110011
  975. tcbist_poll1   0
  976. tcbist_sleep  100
  977. tcbist_ctrl    36:000011100101010111011000000000000011
  978. tcbist_poll1   0
  979. tcbist_sleep  100
  980. tcbist_ctrl    36:000011100101010011011000000000101011
  981. tcbist_poll1   0
  982. tcbist_comment IFA-9 Pattern Test
  983. tcbist_ctrl    36:000011100101010000111000000000110111
  984. tcbist_poll1   0
  985. tcbist_ctrl    36:000011100101010111011000000000000111
  986. tcbist_poll1   0
  987. tcbist_ctrl    36:000011100101010011111000000000000111
  988. tcbist_poll1   0
  989. tcbist_ctrl    36:000011100101010111011000000000000011
  990. tcbist_poll1   0
  991. tcbist_ctrl    36:000011100101010011111000000000000011
  992. tcbist_poll1   0
  993. tcbist_ctrl    36:000011100101010111011000000000000111
  994. tcbist_poll1   0
  995. tcbist_ctrl    36:000011100101010011011000000000101111
  996. tcbist_poll1   0
  997. tcbist_comment Zebra Pattern Test
  998. tcbist_ctrl    36:000011100101010000111111111000110111
  999. tcbist_poll1   0
  1000. tcbist_ctrl    36:000011100101010111111111111000101111
  1001. tcbist_poll1   0
  1002. tcbist_ctrl    36:000011100101010111011111111000110111
  1003. tcbist_poll1   0
  1004. tcbist_ctrl    36:000011100101010011011111111000101111
  1005. tcbist_poll1   0
  1006. tcbist_comment March B Pattern Test
  1007. tcbist_ctrl    36:000011100101010000111000000000110111
  1008. tcbist_poll1   0
  1009. tcbist_ctrl    36:000011100101010111011000000000000111
  1010. tcbist_poll1   0
  1011. tcbist_ctrl    36:000011100101010011111000000000001111
  1012. tcbist_poll1   0
  1013. tcbist_ctrl    36:000011100101010011111000000000010011
  1014. tcbist_poll1   0
  1015. tcbist_ctrl    36:000011100101010111011000000000001011
  1016. tcbist_poll1   0
  1017. tcbist_ctrl    36:000011100101010111011000000000101111
  1018. tcbist_poll1   0
  1019. tcbist_comment Modulo-3 Pattern Test
  1020. tcbist_ctrl    36:000011100101010000000000000101110101
  1021. tcbist_poll1   0
  1022. tcbist_ctrl    36:000011100101010000000000001101000101
  1023. tcbist_poll1   0
  1024. tcbist_ctrl    36:000011100101010000000001010101000101
  1025. tcbist_poll1   0
  1026. tcbist_ctrl    36:000011100101010000001010000101000101
  1027. tcbist_poll1   0
  1028. tcbist_ctrl    36:000011100101010001001000001101000101
  1029. tcbist_poll1   0
  1030. tcbist_ctrl    36:000011100101010001001001010101000101
  1031. tcbist_poll1   0
  1032. tcbist_ctrl    36:000011100101010001010010000101000101
  1033. tcbist_poll1   0
  1034. tcbist_ctrl    36:000011100101010010010000001101000101
  1035. tcbist_poll1   0
  1036. tcbist_ctrl    36:000011100101010010010001010101000101
  1037. tcbist_poll1   0
  1038. tcbist_ctrl    36:000011100101010010011010000101000101
  1039. tcbist_poll1   0
  1040. tcbist_ctrl    36:000011100101010011011000001101000101
  1041. tcbist_poll1   0
  1042. tcbist_ctrl    36:000011100101010011011001010101000101
  1043. tcbist_poll1   0
  1044. tcbist_ctrl    36:000011100101010011100010000101000101
  1045. tcbist_poll1   0
  1046. tcbist_ctrl    36:000011100101010100100000001101000101
  1047. tcbist_poll1   0
  1048. tcbist_ctrl    36:000011100101010100100001010101000101
  1049. tcbist_poll1   0
  1050. tcbist_ctrl    36:000011100101010100101010000101000101
  1051. tcbist_poll1   0
  1052. tcbist_ctrl    36:000011100101010101101000001101000101
  1053. tcbist_poll1   0
  1054. tcbist_ctrl    36:000011100101010101101001010101000101
  1055. tcbist_poll1   0
  1056. tcbist_ctrl    36:000011100101010101110010000101000101
  1057. tcbist_poll1   0
  1058. tcbist_ctrl    36:000011100101010110110000001101000101
  1059. tcbist_poll1   0
  1060. tcbist_ctrl    36:000011100101010110110001010101000101
  1061. tcbist_poll1   0
  1062. tcbist_ctrl    36:000011100101010110111010000101000101
  1063. tcbist_poll1   0
  1064. tcbist_ctrl    36:000011100101010111111000001101000101
  1065. tcbist_poll1   0
  1066. tcbist_ctrl    36:000011100101010111111001010101000101
  1067. tcbist_poll1   0
  1068. tcbist_ctrl    36:000011100101010111111010010101101101
  1069. tcbist_poll1   0
  1070. tcbist_expect0 13 14
  1071. tcbist_ctrl    36:000000000011110000000000000000000000
  1072.